1. Field of the Invention
The present invention relates to a mechanism and process for compressing chips. More particularly, the present invention relates to a mechanism and process for compressing chips to promote the yield factor thereof.
2. Description of Related Art
With the computer hardware, Internet and multimedia technology rapidly developing, the transmission of image information has gradually upgraded from analog transmission to digital transmission. Moreover, the modern life style has called for a thinner and lighter display apparatus. Although the traditional display apparatus made of cathode ray tubes has its own advantages, its bulky size and the radiation emitted during display is still a problem. As a result, a new development combining optoelectronics and semiconductor manufacturing technologies, the flat panel display (FPD), including liquid crystal display (LCD), organic electro-luminescent display (OELD) and plasma display panel (PDP), has become the mainstream display product.
Most of the flat panel displays use transparent substrates, such as glass substrate, instead of the circuit boards often used in other electronic devices. And the main technology for bonding chips in the flat panel displays has developed in three areas: the chip on board (COB), the tape automated bonding (TAB) and the chip on glass (COG).
FIG. 1 is a schematic drawing of the conventional technology for bonding chips on glass. Referring to FIG. 1, it shows the conventional technology of chip on glass by bonding chip 50 onto the glass substrate 80. In a liquid crystal display (LCD), for example, the glass substrate 80 can be the thin film transistor (TFT) substrate. The glass substrate 80 has a plurality of contact pads 82 thereon, and the chip 50 has a plurality of gold bumps 52 thereon. Further, an anisotropic conductive film 70 (ACF) is placed between chip 50 and glass substrate 80. The chip 50 bonds with the glass substrate 80 by thermo compression operated by the mechanism 100. Further, the gold bumps 52 are electrically connected to the contact pads 82 by the conductive particles of the anisotropic conductive film 70. Meanwhile, the anisotropic conductive film 70 is solidified by high temperature so the electrical connection between the gold bumps 52 and the contact pads 82 is stabilized.
However, the chip compressing mechanism 100 offers a fixed direction of the acting force F1. If the fixed direction of the acting force F1 is not perpendicular to the glass substrate 80 (as shown in FIG. 1), the chip 50 will not bond to glass substrate 80 in a parallel angle and the yield factor thereof will be lowered. Furthermore, chip compressing is the latter part of the flat panel display manufacturing process, and a rework is nearly impossible. Therefore, a failed bonding will put the near-completed flat panel display to total waste.
In solution, the manufacturers try to calibrate the chip compressing mechanism before thermo-compressing each batch of the chips. But such calibration is time-consuming and adds extra cost. Furthermore, the calibrated mechanism does not guarantee perfect bonding between the chips and the glass substrate in a parallel angle. Therefore, promoting the yield factor of bonding chips onto the substrates is vital in the flat panel display manufacturing process.